NEWS
OneSpin at DAC 2008
OneSpin Solutions GmbH again exhibited at this year's Design Automation Conference, which took place in Anaheim (June 2008).
This year OneSpin presented its latest major innovation in verification technology employing standard verification languages: the industry's first verification solution that features gap-free RTL verification using SystemVerilog Assertions (SVA). It leverages a new, ground-breaking SVA TIming Diagram Assertion Library, TIDAL™, that helps users easily capture timing diagrams as SVA properties. Users of OneSpin's 360 Module Verifier (360 MV) now can employ SVA to implement the GapFreeVerification™ process that slashes verification effort and ensures highest possible verification quality.
OneSpin also gave an introduction to standard SVA-based verification using 360 MV, covering highest-capacity and highest-performance verification of implementation-level SystemVerilog assertions as well as high-level functional requirements expressed in SVA. Support for these common applications of SVA-based formal verification, and the unique gap-free verification using SVA makes 360 MV the most comprehensive formal verification solution for SVA on the market.
