Visit OneSpin Solutions at DAC, Booth #1505
Come join us in San Diego to experience first-hand “Continuous Innovation in Formal Verification”.
OneSpin Solutions again will demonstrate an “industry’s first” at this year’s Design Automation Conference – our recently announced Quantify MDV. Entirely independent of simulation, this comprehensive solution for automatic metric-driven formal ABV coverage analysis and measurement of RTL designs eliminates all guesswork and uncertainty about formal verification progress and quality. Learn how it provides precise feedback and visibility to engineers and project management throughout a project.
Come hear about about OneSpin recently winning Azini Capital (UK) as a new investor, and about Renesas Electronics – the largest Japanese semiconductor company and market leader in the automotive segment – adopting OneSpin’s 360 MV solution. Renesas chose 360 MV for its company-wide functional verification environment for microcontroller (MCU) platforms because it enables 50X faster verification of MCU products than other approaches.
OneSpin 360® MV Demonstrations
1. 'Measuring Formal Verification Progress and Quality Accurately'
Quantify MDV, for the first time, allows for a pure formal metric-driven verification approach without any assistance from simulation-based metric generation. This unique enhancement to our 360 MV product family automatically uncovers verification holes, provides accurate metrics about unverified and verified RTL code, and supports flexible integration with other verification flows and coverage tools such as the Unified Coverage Data Base (UCDB).
2. 'Preventing X-related Bugs through True Exhaustive 4-state Formal Analysis'
Another recent enhancement of 360 MV for 4-state-logic formal analysis enables exhaustive pre-synthesis X-analysis and X-verification. In contrast to simulation, it allows users to safely uncover all locations and conditions of unintended, dangerous X-propagation that lead to data corruption or errors in control paths.
3. 'Verifying Processors Beyond Doubt'
See how to apply the specification-level assertions of Operational ABV and exhaustive coverage analysis to verify processors at the level of their instruction set architecture – ensuring that no processor behavior is missed during verification.