DAC
OneSpin Solutions at DAC 2008
'Verified beyond doubt' – Visit OneSpin at DAC Booth #625
Attention: RTL, IP and ASIC Engineers!
If you're like most engineers, you verify digital RTL modules and IP using simulation alone or combined with formal verification. And you spend serious efforts for detailed verification planning and for applying coverage-driven verification methodologies to cover bases and corner cases. So there are no verification gaps left, right? Okay, stop laughing and get off the floor!
OneSpin Solutions' 360™ Module Verifier (360 MV) ensures there are no verification gaps. This award-winning formal verification solution efficiently delivers the highest-achievable verification quality and slashes verification effort by 50 per cent or more. And it has been customer-proven in hundreds of commercial verification projects.
At this year's Design Automation Conference, OneSpin will present how this innovative, next-generation verification solution will deliver these results for you. One demo with a short tutorial will show how 360 MV handles standard SystemVerilog Assertions (SVA), allowing you to continue to use your assertion-based verification flow, verify new assertions and re-use legacy assertions. Another demo will provide a detailed insight into OneSpin's recently-announced GapFreeVerification™ process. This systematic process, based on the results of a decade of best engineering practices, will efficiently guide you from initial verification planning to final gap-free verification success – whether you are a formal expert or new to formal verification. And watch out for OneSpin's latest breakthrough in RTL formal verification – the announcement will be made right in time for DAC!
Pre-registering online or by calling us at 408.734.1900 or +49 89 99013 0 automatically qualifies you for our daily raffle at 5:00 p.m. and a chance to win a Sony PSP.
Find your path to verification beyond doubt at Booth #625.
We look forward to seeing you at DAC!