INFORMATION MATERIAL

OneSpin's Datasheets, Articles, White Papers


OneSpin's Datasheets

Complete Formal Verification of TriCore2 and Other Processors (White Paper)

This paper, first published at DVCon 2007, describes the application of OneSpin's 360 MV to the verification of the TriCore2 processor, Infineon's next generation high-end processor for embedded and safety-critical applications. Unlike other formal approaches, the employed methodology is a self-contained approach to hardware verification, independent of simulation. It systematically eliminates all gaps in the verification plan and in the property set and thus ensures that the IP is free of functional errors – the highest possible quality.
Complete Formal Verification of TriCore2 and Other Processors

Understanding Completeness (EEtimes article)

360 MV is the only complete functional verification solution. Verification is objectively 'complete' when all output signals of the design under verification have been verified to have their expected values at any point in time for any possible input scenario. This notion of completeness implies 100% input scenario coverage and 100% output behavior coverage, the highest possible coverage that any functional verification can achieve and the key to ensure error-free operation. It can only be achieved when transforming formal verification from the common bug-hunting and corner-case inspection approach into a full 'functional sign-off' approach. The details on complete functional verification compared to other functional verification approaches – be it simulation-based, assertion-based, or formal – is explained in the following EETimes article:
EETimes article: Achieving Completeness in IP Functional Verification

Delivering on formal verification's original promise (EEtimes article)

A decade ago, gate-level simulation was replaced by a new formal verification approach: equivalence checking, which proved to deliver far superior results. In this EETimes viewpoint, Peter Feist, president and CEO of OneSpin, explains why complete formal functional verification has the same potential, replacing simulation based verification for a broad range of digital modules and IP.
EETimes article: Delivering on formal verification's original promise

Achieving Highest, Certified IP Quality Efficiently (EEtimes article)

The article describes from the perspective of an IP provider the verification of a configurable network processor – called PPv2 – using OneSpin’s 360 MV. It explains the details of this verification project and how the following results were achieved:
  • error-free functional operation of the PPv2 across all possible configurations
  • a verification report that certifies the achieved IP quality and enables rapid IP quality assessment
  • a complete description of integration conditions for the IP
  • a considerably improved specification
  • no IP revision or redesign has been necessary since release
  • a total verification effort of 4 engineer-months, about 40% less than that in the simulation-based verification of PPv1
EETimes article: Achieving Highest, Certified IP Quality Efficiently

Further publication about 360 MV

Formal tool opens 'gateway' to assertion reuse by Richard Goering
Formal property checking -- what the users say by Richard Goering
Formal property checking -- what the vendors say by Richard Goering
Formal verification expands its use model by Bill Murray