OneSpin's Solutions Enhances 360 MV for Safe, Exhaustive 4-state X-Analysis and X-Verification
New 4-State Formal Analysis and Verification Capability Ensures Absence of X-Related Design Errors and RTL-to-Netlist Mismatches
MUNICH, Germany and SUNNYVALE, Calif. – June 7, 2010 – OneSpin Solutions, an EDA company that provides innovative formal assertion-based verification solutions, today announced that it has enhanced its flagship product OneSpin 360™ MV to perform 4-state X-analysis and X-verification.This enhancement enables safe, exhaustive analysis of unknown, undefined, and "don't care" signal values (X's) and their propagation through a design. In contrast to simulation, it enables users to safely uncover all locations and conditions of unintended, dangerous X-propagation that lead to data corruption or errors in control paths.
Moreover, 360 MV's 4-state analysis does not suffer from the X-optimism that plagues 4-state RTL simulation, which results in incorrect coverage information, potential masking of design bugs and mismatches between RTL and netlist simulation – sources of functional errors that are often extremely challenging and time-consuming to find.
OneSpin will show 360 MV's 4-state formal analysis for the first time in public at a free verification tutorial in Booth #1311 at the Design Automation Conference (DAC) in Anaheim, Calif., June 13-18, 2010.
360 MV's support of 4-state logic extends the 2-state logic (0,1) commonly used in formal analysis to include X and Z (floating values). 360 MV automatically identifies all design signals that can become X, and enables designers to use X-aware constructs – such as "$isunknown" and "===" – to write simple assertions to fully explore the propagation of X's through their design. Failing assertions are debugged using 360 MV's RootCauseAnalyzer environment. Its waveform viewer, SVA debugger, fan-in viewer, RTL value annotation, and driver tracing afford full visibility of X's and full traceability of X propagation in the design, unlike 2-state formal analysis.
"360 MV allows users to fully exploit the use of X's for RTL verification and synthesis optimization without the pitfalls and risks of X-related bugs," Michael Siegel, OneSpin's VP Product Marketing, explained. "For example, designers can now easily determine whether given registers can safely be left uninitialized – to reduce chip area – without breaking their design. 360 MV ensures the X-robustness of designs before synthesis, saving effort in late gate-level simulation."
Availability
The new enhancement is available now in OneSpin's 360 MV.OneSpin at DAC 2010
OneSpin will exhibit 360 MV in Booth # 1311 at DAC 2010 in Anaheim, California, June 13-18.Besides the complimentary 4-state formal analysis tutorial, three additional complimentary assertion-based verification tutorials will show engineers
(1) the use of formal coverage analysis to automatically detect verification holes,
(2) gap-free processor verification, and
(3) progress in the exhaustive verification of complex arithmetic.
OneSpin will show these tutorials each hour.
Contact info@onespin-solutions.com for more information and to schedule private meetings at DAC.

