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Customer Testimonials

A. Haggenmiller, Infineon Technology

Infineon Alexander Haggenmiller, Director Intellectual Property and Re-Use at the Communication Solutions business group at Infineon Technologies: "Using OneSpin technology, we fully verified the PPv2 protocol processor, including its advanced context switching, which is a central IP component of our communication applications. This verification approach assured that the complete functionality of the PPv2 was covered and bug escape routes blocked. Moreover, the total verification effort was about 40% less than that in a previous, simulation-based project."

Dr. M. Schutti, DICE GmbH & Co KG

DICE Dr. Markus Schutti, Director Digital Development at DICE GmbH & Co KG: "We used OneSpin's property verification on numerous modules and discovered that writing and proving properties is easier and much faster than setting up test-benches. Short response times, even on large modules, allow very fast check-debug-fix cycles - often within minutes. We used OneSpin's solution on a well-simulated communication peripheral IP for base-band chips and found 15 additional awkward errors with four person-weeks effort."

H. Soukup, Siemens Com

Siemens Holger Soukup, Director SoC Development, Siemens Com, Munich: "Our team has used OneSpin's technology in the verification of various designs, including two 4-million-gate SoC designs with extremely complex logic and multiple re-use blocks. It turned out that OneSpin's formal module verification perfectly completed our verification portfolio. For the functionalities being verified, it was less costly, faster and yielded higher quality than any kind of dynamic verification. Furthermore, the improved block quality considerably reduced our costs for system-level verification. As a result, we met both a very tight time-to-market schedule and our quality aims."

Sun Meng Sumner, Design & Verification engineer, Infineon Villach

RTL Verification Professionals Quote from a Linked-in group discussion, author Sun Meng Sumner: "Do you still think that formal verification is just a theory? If so, I suggest you update your mind a little bit. SVA right now is so hot. I find so many discussions, as a standard it is good to use. However, tools handle that with limitations.
With my information the best tool in this area is Onespin 360MV. It is very efficient, and shows quite good performance with even large design. My daily work is an industrial sized application project and not just research. Hence, it is important that the tool can definitely help our project.
Since I was not a System Verilog expert when I start with Onespin, I used their proprietary language ITL. I got productive within a day due to the language being VHDL/Verilog added with timing behavior. It's a little bit like writing a timing diagram instead of drawing it. So even if you've never written any property before, you can start with property checking easily, no need to spend time for testbench design. Additionally to pure assertion based verification, I also made experience with what is called gap free verification by OneSpin. The tool allows to check whether your properties already completely verify your design. I experienced this to be very powerful, however you have to spend more learning effort than for pure assertion based verification. Although ITL is easy to use, today I suggest to use SVA giving you a standard assertion language. If later you find some tool that can compete with OneSpin in capacity and performance but is, e.g., cheaper, your tool switch will be easier.
To my current experience, I think OneSpin 360MV is still the best. "